Digital STD Cell Library Development Engineer

Responsibilities
● Schematic capture, optimization and simulation.
● Develop efficient circuit designs digital circuit and STD cell library meeting
performance, power and area target.
● Work with a layout designer to implement the layout of circuit.
● Study and invent new digital STD cell circuit design architecture.

Requirements

Qualifications
● BSEE or related field required
● 3+ years industry experience required
● Proven track record of ability to perform transistor level, analog integrated circuit
design in CMOS technology
● Strong technical and verbal communication skills
● Knowledge of microelectronic fundamentals & semiconductor electronics
● Excellent problem-solving skills
● Familiarity with the following tools: Cadence analog or mixed-signal tools (Virtuoso,
Spectre, etc), Analog circuit simulators (HSpice, Spectre, Eldo, Customsim, etc),
Linux and Windows OS
● Having Digital STD cell library develop experience is preferred
● Study characterize library/Analog layout skill for future work. Already having one of
those capabilities is preferred.